VLSI Design of a 16-bit RISC Vector Processor for Computing Applications

This paper includes the designing of 16Bit RISC processor and modeling of its components using VHDL. The implementation strategies have been borrowed from most popular MIPS architecture up to certain extent. The instruction set adopted here is extremely simple that gives an insight into the kind of hardware which should be able to execute the set of instructions properly. Along with sequential and combinational building blocks of NONpipelined processor such as adders and registers more complex blocks i.e. ALU and Memories had been designed and simulated. The tools which had been used throughout the project work are XILINX v14.1 ISE Design simulator. For synthesis purpose the targeted FPGA device technology was VIRTEX 6. The processor is powerful enough to be used as a stand-alone processing element and is generic enough to be used within multi-processor System on Chip. The processor has been designed to optimize the size i.e. space it acquire on FPGA. We have further tested the processor for scientific computing tasks and verified its performance by executing a particular task over it and some other processors and comparing the execution time of all.